Vertical scaling is vital to increasing the storage density of 3D NAND. According to imec, airgap integration and charge trap layer separation are the keys to unlocking it. Inside the charge trap cell ...
Spansion Inc. and United Microelectronics Corporation announced the joint development of a 40nm process that integrates UMC’s 40nm LP logic process with Spansion® proprietary embedded Charge Trap (eCT ...
A technical paper titled “Low-Power Charge Trap Flash Memory with MoS 2 Channel for High-Density In-Memory Computing” was published by researchers at Kyungpook National University, Sungkyunkwan ...
A technical paper titled “Non-volatile heterogeneous III-V/Si photonics via optical charge-trap memory” was published by researchers at Hewlett Packard Enterprise. “We demonstrate, for the first time, ...
The part 1 of this two-article series outlined the NAND flash technology and how it transitioned from 2D to 3D NAND flash. The article also explained the current challenges in the way of density ...
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